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KVM then stops offering hle and rtm, QEMU filters them, > and a guest started with TSX can no longer be migrated, restored or > reverted to a snapshot on that host: libvirt rejects the filtered > features (VSTOR-75689, VSTOR-105458). The guest read its CPUID at > boot, so the bits have to stay until it is restarted. > > Add x-tsx-compat: hle and rtm requested by an Intel CPU model or on > the command line are then not filtered, and KVM gets them in the guest > CPUID, ignoring bits it does not support. This also covers Haswell > parts with the TSX erratum, where QEMU drops the bits itself and the > erratum microcode disables TSX. With TSX disabled by microcode XBEGIN > aborts and HLE prefixes are ignored, so a guest that keeps using TSX > falls back to its lock path. Where TSX_CTRL disables TSX instead, > XBEGIN raises #UD, as it does with the libvirt relaxation this > replaces. > > As a machine type property it also applies when such a guest is booted > afresh: it gets the CPUID it had on the older node, not a filtered one. > Limiting it to -incoming would make the CPUID depend on how the process > was started, and a cold boot with libvirt check='full' would fail on a > host without TSX. A guest that migrated in already runs with the bits, > so the cold boot adds no new failure mode. The kept bits are not > reported as filtered, so check and enforce stay silent for them. > > pc_vz_9_2_compat turns it on for vz9.2.0 and every older vz machine > type. Release 7.x ships up to vz9.1.0, and vz9.2.0 is the last type > based on a RHEL 9 machine type, before the QEMU 10 based vz10.x types. > vz10.x types and -cpu host expansion stay strict. > > Signed-off-by: Denis V. Lunev > > diff --git a/hw/i386/pc.c b/hw/i386/pc.c > index 76289b86c28..25b17866103 100644 > --- a/hw/i386/pc.c > +++ b/hw/i386/pc.c > @@ -548,6 +548,11 @@ GlobalProperty pc_vz_compat[] = { > }; > const size_t pc_vz_compat_len = G_N_ELEMENTS(pc_vz_compat); > > +GlobalProperty pc_vz_9_2_compat[] = { > + { TYPE_X86_CPU, "x-tsx-compat", "on" }, > +}; > +const size_t pc_vz_9_2_compat_len = G_N_ELEMENTS(pc_vz_9_2_compat); > + > GlobalProperty pc_vz_7_16_compat[] = { > { TYPE_X86_CPU, "kvm-pv-ipi", "off" }, > { TYPE_X86_CPU, "kvm-pv-tlb-flush", "off" }, > diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c > index 1a50c2a645c..5be7c2ab967 100644 > --- a/hw/i386/pc_piix.c > +++ b/hw/i386/pc_piix.c > @@ -1060,7 +1060,8 @@ DEFINE_I440FX_RHEL_MACHINE(7, 2, 0); > X(10, 0, 0, MT_VER_SYM(10, 0, 0), false) \ > X(7, 16, 0, MT_VER_SYM(7, 6, 0), false, hw_compat_vz_9_1, \ > hw_compat_vz_7_16, \ > - pc_vz_7_16_compat) \ > + pc_vz_7_16_compat, \ > + pc_vz_9_2_compat) \ Small nit: keep compats in order, i.e. newest 9.2 first. Just for readability. Otherwise LGTM. Acked-by: Andrey Drobyshev -- Andrey Drobyshev