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From: Konstantin Khorenko <khorenko@virtuozzo.com>
To: Pavel Tikhomirov <ptikhomirov@virtuozzo.com>,
	Vasileios Almpanis <vasileios.almpanis@virtuozzo.com>
Cc: devel@openvz.org
Subject: [Devel] [PATCH hci-8.1 1/5] selftests/ve: check CPUID override emulation for VE tasks
Date: Tue, 06 Oct 2026 16:56:34 +0200	[thread overview]
Message-ID: <20261006-b4-prep-khorenko-vstor-148656-cpuid-v1-1-741609f4f03a@virtuozzo.com> (raw)
In-Reply-To: <20261006-b4-prep-khorenko-vstor-148656-cpuid-v1-0-741609f4f03a@virtuozzo.com>

Write a one-entry /proc/vz/cpuid_override table that clears one leaf 1
feature bit and compare what a task in a fresh VE and the host see:
the VE task must get the table values, the host the hardware ones.

A second test flushes the table after the task was armed and expects the
hardware values again, since faulting stays on for the task and the
emulation has to fall back to the real CPUID.

The child blocks before executing CPUID: faulting is switched on for a
task at its next context switch, not when the flag is set.

Without the fix both children die with SIGSEGV. The tests skip on CPUs
without CPUID faulting and restore the previous table on exit. The
teardown runs in the parent because the harness skips a child-side
teardown once an ASSERT has fired.

https://virtuozzo.atlassian.net/browse/VSTOR-148843

Feature: x86: cpu pools (cpuid override)
Signed-off-by: Konstantin Khorenko <khorenko@virtuozzo.com>
---
 tools/testing/selftests/ve/Makefile                |   1 +
 .../testing/selftests/ve/ve_cpuid_override_test.c  | 227 +++++++++++++++++++++
 2 files changed, 228 insertions(+)

diff --git a/tools/testing/selftests/ve/Makefile b/tools/testing/selftests/ve/Makefile
index c6efe7c4b4fba..e7932408b1305 100644
--- a/tools/testing/selftests/ve/Makefile
+++ b/tools/testing/selftests/ve/Makefile
@@ -5,5 +5,6 @@ CFLAGS += -g -Wall -O2
 TEST_GEN_PROGS += ve_ns_owner_test
 TEST_GEN_PROGS += ve_perms_test
 TEST_GEN_PROGS += ve_mount_accounting_test
+TEST_GEN_PROGS += ve_cpuid_override_test
 
 include ../lib.mk
diff --git a/tools/testing/selftests/ve/ve_cpuid_override_test.c b/tools/testing/selftests/ve/ve_cpuid_override_test.c
new file mode 100644
index 0000000000000..c066d67d72a82
--- /dev/null
+++ b/tools/testing/selftests/ve/ve_cpuid_override_test.c
@@ -0,0 +1,227 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * /proc/vz/cpuid_override selftests
+ *
+ * A non-empty override table turns CPUID faulting on for every task that
+ * enters a VE, and the #GP handler has to emulate the instruction for
+ * them. The tests check that a task in a VE sees the table values, that
+ * the host keeps seeing the hardware values, and that a task which was
+ * armed while the table was set falls back to the hardware once the
+ * table is flushed. A kernel that does not emulate the fault kills the
+ * child with SIGSEGV instead.
+ */
+#define _GNU_SOURCE
+#include <sched.h>
+#include <signal.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+#include <fcntl.h>
+#include <errno.h>
+#include <sys/wait.h>
+
+#include "../kselftest_harness.h"
+#include "ve_selftest.h"
+
+#define CPUID_OVERRIDE_PATH	"/proc/vz/cpuid_override"
+#define CPUID_LEAF		1
+#define CPUID_TABLE_LEN		128
+#define CPUID_TABLE_MAX		4096
+
+struct cpuid_regs {
+	unsigned int eax, ebx, ecx, edx;
+};
+
+static void do_cpuid(unsigned int leaf, struct cpuid_regs *r)
+{
+	asm volatile("cpuid"
+		     : "=a" (r->eax), "=b" (r->ebx), "=c" (r->ecx), "=d" (r->edx)
+		     : "a" (leaf), "c" (0));
+}
+
+static int write_cpuid_override(const char *table)
+{
+	int fd, ret;
+
+	fd = open(CPUID_OVERRIDE_PATH, O_WRONLY);
+	if (fd < 0)
+		return -1;
+	ret = write(fd, table, strlen(table));
+	close(fd);
+	return ret == (int)strlen(table) ? 0 : -1;
+}
+
+/*
+ * The child enters a fresh VE, so it is armed with the table state of that
+ * moment, then reports its view of the leaf to the parent over a pipe. It
+ * blocks between the two steps: faulting is switched on for the task at its
+ * next context switch, and the parent may change the table meanwhile.
+ */
+struct child_ctx {
+	int result_pipe[2];
+	int go_pipe[2];
+};
+
+static int cpuid_child(struct child_ctx *ctx)
+{
+	struct cpuid_regs r;
+	char go;
+
+	close(ctx->result_pipe[0]);
+	close(ctx->go_pipe[1]);
+
+	if (unshare(CLONE_NEWVE) < 0)
+		return 21;
+	if (write(ctx->result_pipe[1], "R", 1) != 1)
+		return 22;
+	if (read(ctx->go_pipe[0], &go, 1) != 1)
+		return 23;
+
+	do_cpuid(CPUID_LEAF, &r);
+	if (write(ctx->result_pipe[1], &r, sizeof(r)) != sizeof(r))
+		return 24;
+	return 0;
+}
+
+FIXTURE(ve_cpuid_override)
+{
+	int cgv2_fd;
+	int ctid;
+	struct cpuid_regs host;
+	unsigned int bit;
+	char table[CPUID_TABLE_LEN];
+	char saved[CPUID_TABLE_MAX];
+};
+
+FIXTURE_SETUP(ve_cpuid_override)
+{
+	int fd;
+
+	fd = open(CPUID_OVERRIDE_PATH, O_RDONLY);
+	if (fd < 0)
+		SKIP(return, "%s: %s", CPUID_OVERRIDE_PATH, strerror(errno));
+	close(fd);
+
+	ASSERT_GE(read_file_at(AT_FDCWD, CPUID_OVERRIDE_PATH, self->saved,
+			       sizeof(self->saved)), 0);
+
+	self->cgv2_fd = mount_cg2_fd();
+	ASSERT_GE(self->cgv2_fd, 0);
+	ASSERT_EQ(write_file_at(self->cgv2_fd, "cgroup.subtree_control",
+				VE_CONTROLLERS), 0);
+	self->ctid = make_ve(self->cgv2_fd, CTID_MIN);
+	ASSERT_GE(self->ctid, 0);
+
+	/* Mask one feature bit the host has; SSE2 when present. */
+	do_cpuid(CPUID_LEAF, &self->host);
+	self->bit = 1u << 26;
+	if (!(self->host.edx & self->bit))
+		self->bit = self->host.edx & -self->host.edx;
+	ASSERT_NE(self->bit, 0);
+
+	snprintf(self->table, sizeof(self->table),
+		 "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n", CPUID_LEAF,
+		 self->host.eax, self->host.ebx, self->host.ecx,
+		 self->host.edx & ~self->bit);
+}
+
+/*
+ * Runs in the parent: a child-side teardown is skipped when an ASSERT fires,
+ * and the table must be restored even then. The fd from setup belongs to the
+ * child, so the cgroup2 tree is mounted again here.
+ */
+FIXTURE_TEARDOWN_PARENT(ve_cpuid_override)
+{
+	int cgv2_fd;
+
+	write_cpuid_override(self->saved[0] ? self->saved : "\n");
+
+	cgv2_fd = mount_cg2_fd();
+	if (cgv2_fd < 0)
+		return;
+	destroy_ve(cgv2_fd, self->ctid);
+	close(cgv2_fd);
+}
+
+static pid_t spawn_cpuid_child(struct __test_metadata *_metadata,
+			       int cgv2_fd, int ctid, struct child_ctx *ctx)
+{
+	char ready;
+	pid_t pid;
+
+	ASSERT_EQ(pipe(ctx->result_pipe), 0);
+	ASSERT_EQ(pipe(ctx->go_pipe), 0);
+	ASSERT_GE(enter_cgroup(cgv2_fd, ctid), 0);
+
+	pid = fork();
+	ASSERT_GE(pid, 0);
+	if (pid == 0)
+		_exit(cpuid_child(ctx));
+
+	ASSERT_GE(enter_cgroup(cgv2_fd, 0), 0);
+	close(ctx->result_pipe[1]);
+	close(ctx->go_pipe[0]);
+
+	ASSERT_EQ(read(ctx->result_pipe[0], &ready, 1), 1);
+	ASSERT_EQ(ready, 'R');
+	return pid;
+}
+
+static void collect_cpuid_child(struct __test_metadata *_metadata, pid_t pid,
+				struct child_ctx *ctx, struct cpuid_regs *r)
+{
+	int status, len;
+
+	len = read(ctx->result_pipe[0], r, sizeof(*r));
+	ASSERT_GE(waitpid(pid, &status, 0), 0);
+	if (WIFSIGNALED(status))
+		TH_LOG("child killed by signal %d", WTERMSIG(status));
+	ASSERT_TRUE(WIFEXITED(status));
+	ASSERT_EQ(WEXITSTATUS(status), 0);
+	ASSERT_EQ(len, sizeof(*r));
+
+	close(ctx->result_pipe[0]);
+	close(ctx->go_pipe[1]);
+}
+
+TEST_F(ve_cpuid_override, ve_sees_table_host_sees_hardware)
+{
+	struct child_ctx ctx;
+	struct cpuid_regs r;
+	pid_t pid;
+
+	ASSERT_EQ(write_cpuid_override(self->table), 0);
+
+	pid = spawn_cpuid_child(_metadata, self->cgv2_fd, self->ctid, &ctx);
+	ASSERT_EQ(write(ctx.go_pipe[1], "G", 1), 1);
+	collect_cpuid_child(_metadata, pid, &ctx, &r);
+
+	EXPECT_EQ(r.eax, self->host.eax);
+	EXPECT_EQ(r.ebx, self->host.ebx);
+	EXPECT_EQ(r.ecx, self->host.ecx);
+	EXPECT_EQ(r.edx, self->host.edx & ~self->bit);
+
+	do_cpuid(CPUID_LEAF, &r);
+	EXPECT_NE(r.edx & self->bit, 0);
+}
+
+TEST_F(ve_cpuid_override, flushed_table_falls_back_to_hardware)
+{
+	struct child_ctx ctx;
+	struct cpuid_regs r;
+	pid_t pid;
+
+	ASSERT_EQ(write_cpuid_override(self->table), 0);
+
+	pid = spawn_cpuid_child(_metadata, self->cgv2_fd, self->ctid, &ctx);
+
+	ASSERT_EQ(write_cpuid_override("\n"), 0);
+	ASSERT_EQ(write(ctx.go_pipe[1], "G", 1), 1);
+	collect_cpuid_child(_metadata, pid, &ctx, &r);
+
+	EXPECT_EQ(r.eax, self->host.eax);
+	EXPECT_NE(r.edx & self->bit, 0);
+}
+
+TEST_HARNESS_MAIN

-- 
2.43.0

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  reply	other threads:[~2026-10-06 14:58 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-06 14:56 [Devel] [PATCH hci-8.1 0/5] x86/ve: CPUID override follow-ups: arm at once, prefixes, selftests Konstantin Khorenko
2026-10-06 14:56 ` Konstantin Khorenko [this message]
2026-10-06 15:07   ` [Devel] [PATCH hci-8.1 1/5] selftests/ve: check CPUID override emulation for VE tasks no-reply
2026-10-06 14:56 ` [Devel] [PATCH hci-8.1 2/5] x86/ve: enable CPUID faulting at once when the current task enters a VE Konstantin Khorenko
2026-10-06 15:01   ` no-reply
2026-10-06 14:56 ` [Devel] [PATCH hci-8.1 3/5] selftests/ve: check CPUID override right after entering " Konstantin Khorenko
2026-10-06 15:03   ` no-reply
2026-10-06 14:56 ` [Devel] [PATCH hci-8.1 4/5] x86/traps: decode the faulting CPUID with the instruction decoder Konstantin Khorenko
2026-10-06 15:04   ` no-reply
2026-10-06 14:56 ` [Devel] [PATCH hci-8.1 5/5] selftests/ve: check CPUID override emulation for a prefixed CPUID Konstantin Khorenko
2026-10-06 15:04   ` no-reply

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