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[130.117.225.111]) by mx.google.com with ESMTPS id ffacd0b85a97d-48c724bd3ddsi491447f8f.470.2026.10.06.10.19.18 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Oct 2026 10:19:18 -0700 (PDT) Received-SPF: pass (google.com: domain of khorenko@virtuozzo.com designates 130.117.225.111 as permitted sender) client-ip=130.117.225.111; Authentication-Results: mx.google.com; dkim=pass header.i=@virtuozzo.com header.s=relay header.b=YEuWQPXV; spf=pass (google.com: domain of khorenko@virtuozzo.com designates 130.117.225.111 as permitted sender) smtp.mailfrom=khorenko@virtuozzo.com; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=virtuozzo.com DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=virtuozzo.com; s=relay; h=Message-Id:Content-Type:MIME-Version:Subject:Date :From; bh=qEJlbM096ShfP6uQScu2MizNSIShoW7x81TUmuyGOBs=; b=YEuWQPXVNYJeYHDlucS /VThuhbGyKUijJVCg8SWtU/kkI2JrB/xdv7d5395VNSW3vGVtd+nyyOpQ7n7Ke+DeGWzdxGTXBCf7 copMO7Hd+PludCiHvvDHEvmcWH1gn1O5w+c4n1wqXs6R5ry4qcYSxnC07GiHG2fR0x8mEX+f2spaE Br5kqrBGhneRvCFA1wenuuNtYxyZuqfv2oiFzHDOvbikL84k720WleQY4huL3n71ML7XM57rNfaIY HOE6GK5V2PxboyGibxaheBSJQFqoQIYaEM3bYjYB83Jw2NlBLfEJGN4aa0VWooPdSi99VYirtSyyZ 3pKcgnIT6kECT0g==; Received: from ch-demo-asa.virtuozzo.com ([130.117.225.8] helo=f0.sw.ru) by relay.virtuozzo.com with esmtp (Exim 4.96) (envelope-from ) id 1xE8lh-00GXnn-1p; Tue, 06 Oct 2026 19:19:08 +0200 From: Konstantin Khorenko Date: Tue, 06 Oct 2026 19:19:13 +0200 MIME-Version: 1.0 Message-Id: <20261006-b4-prep-khorenko-vstor-148656-cpuid-v2-4-f6d1192c7d60@virtuozzo.com> References: <20261006-b4-prep-khorenko-vstor-148656-cpuid-v2-0-f6d1192c7d60@virtuozzo.com> In-Reply-To: <20261006-b4-prep-khorenko-vstor-148656-cpuid-v2-0-f6d1192c7d60@virtuozzo.com> To: Pavel Tikhomirov , Vasileios Almpanis X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2740; i=khorenko@virtuozzo.com; h=from:subject:message-id; bh=6m/g5pNf/ipAkqDG11BqXp81XqDDJtv6EHkd+2i5fHM=; b=owEBbQKS/ZANAwAKAVGWCkf5YVwqAcsmYgBqxS2UBginh9uSoEmZ9t77fXGpPXvLaqxjIrd2i RkOHCKg0geJAjMEAAEKAB0WIQRWD23IPcXT0GO9CCxRlgpH+WFcKgUCasUtlAAKCRBRlgpH+WFc KjxAD/9h5YvnKgifqTBK4Lmz/uEtmJrXRhRj0GtELR/ysUGRNfttt2K22OdKwPeRcw7BHk91cjO LIElUGdCQW3GwtHEXbSaXNMxmYR4oshICykotwuH2iJq0buYsFVwhgcoe+lduuEir/KUMK1CPmA TqMkwfANC5tFfxMUPO0d7tUHHjCuX5dKyUo8hNCNnFTRFeLegyNCuwsJ7NjXfHhTqAa0pcImGSq 6uyOpuzYOynZ/D7j07u6cphaDaOYfOraubeN5kUDKuOTtCLS1Jmku0kf3qymMLatO41Dr1GwF/a +2vmmn5FSpe8gmr9HovL8T+QuIHrV87iuLHGnvAy+P2p2qI+tJSsNTZpbN/ZoSSaq4SBEqHpLJK AMh8I+umbKKAa40rqG8UkIk/kJ3/LHhqkmCB0SM+qS7L4BMud95YdvTcuPTuY3JNqWhOw7B8eQg 24UtgNmpEVFTO8QAJVeU/tr/3YOBuFDrMHuSecYzMkvCisBfDvW03QrxwhSHqTDrcK+QztFW8tV EBz91g+IqReTlbuOD/Z2PMd9t0r6wH4UTjPNK53s/nnaYAaS4pjYOCvtkCNLSot+84E+3t3RMPz sYeaZK94d6VSzmTLcfMh26Ctu0qlsNfDQClW7ICo2W94LnpFw/ipt1VUXPRv0P3nK9m1jlUTiCF 8Jx/QeqMNOCKC6A== X-Developer-Key: i=khorenko@virtuozzo.com; a=openpgp; fpr=560F6DC83DC5D3D063BD082C51960A47F9615C2A X-OZ-Fwd: true Cc: devel@openvz.org Subject: [Devel] [PATCH hci-8.1 v2 4/5] x86/traps: decode the faulting CPUID with the instruction decoder X-BeenThere: devel@openvz.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: OpenVZ development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: devel-bounces@openvz.org Errors-To: devel-bounces@openvz.org check_cpuid_fault() reads two bytes at the faulting ip and emulates only when they are 0f a2, the bare CPUID encoding. CPUID has no operands, so the CPU accepts and ignores every legacy and REX prefix in front of it. All of these are valid CPUID and raise the same #GP(0) when CPUID faulting is on: 0f a2 cpuid 66 0f a2 data16 cpuid (operand-size override) f3 0f a2 repz cpuid 2e 0f a2 cs cpuid (segment override) 48 0f a2 rex.W cpuid Only the first one is recognised. For the others the handler reads the prefix byte instead of the opcode, declines, and the task is killed with SIGSEGV although the instruction is legal and the host would have executed it. Such encodings could come from hand-written and generated assembly, from binary translators and JITs that emit prefixes for alignment or as padding, and from any binary that disassembles as "data16 cpuid" rather than "cpuid". Fetch and decode the instruction with insn_fetch_from_user() and insn_decode_from_regs(), as fixup_umip_exception() does, match the opcode bytes and advance ip by the decoded length. The decoder derives the linear ip from the code segment itself, so convert_ip_to_linear() is not needed any more. Fixes: 1033fe455434 ("arch/x86: introduce cpuid override") https://virtuozzo.atlassian.net/browse/VSTOR-148843 Feature: x86: cpu pools (cpuid override) Signed-off-by: Konstantin Khorenko --- arch/x86/kernel/traps.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index 8074387bf4f43..fa12da67adbf0 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c @@ -633,8 +633,9 @@ static enum kernel_gp_hint get_kernel_gp_address(struct pt_regs *regs, static int check_cpuid_fault(struct pt_regs *regs, long error_code) { - unsigned long addr; - unsigned short opcode; + unsigned char buf[MAX_INSN_SIZE]; + struct insn insn; + int nr_copied; if (error_code != 0) return 0; @@ -642,16 +643,19 @@ static int check_cpuid_fault(struct pt_regs *regs, long error_code) if (test_thread_flag(TIF_NOCPUID)) return 0; - addr = convert_ip_to_linear(current, regs); - if (get_user(opcode, (unsigned short __user *)addr)) + nr_copied = insn_fetch_from_user(regs, buf); + if (nr_copied <= 0) + return 0; + + if (!insn_decode_from_regs(&insn, regs, buf, nr_copied)) return 0; - if (opcode != 0xa20f) + if (insn.opcode.bytes[0] != 0x0f || insn.opcode.bytes[1] != 0xa2) return 0; do_cpuid_fault(regs); - regs->ip += 2; + regs->ip += insn.length; return 1; } -- 2.43.0 _______________________________________________ Devel mailing list Devel@openvz.org https://lists.openvz.org/mailman/listinfo/devel