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Lunev" To: andrey.zhadchenko@virtuozzo.com Date: Thu, 29 Oct 2026 10:56:42 +0100 Message-ID: <20261029095645.4173762-4-den@openvz.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20261029095645.4173762-1-den@openvz.org> References: <20261029095645.4173762-1-den@openvz.org> MIME-Version: 1.0 X-OZ-Fwd: true Cc: devel@openvz.org Subject: [Devel] [PATCH hci-8.0/hci-8.1 3/6] i386: keep spec-ctrl for AMD guests on vz machine types up to vz9.2.0 #VSTOR-151770 X-BeenThere: devel@openvz.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: OpenVZ development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: devel-bounces@openvz.org Errors-To: devel-bounces@openvz.org From: Denis V. Lunev Since kernel commit de572491a975 ("KVM: x86: AMD's IBPB is not equivalent to Intel's IBPB") KVM offers spec-ctrl on AMD hosts only with IBPB_RET, which Zen 1-3 lack. A guest started under an older kernel has spec-ctrl in its CPUID, and QEMU filters it on the new host, so migration, restore and snapshot revert fail (VSTOR-151770). Add x-spec-ctrl-compat and turn it on in pc_vz_9_2_compat: an AMD guest keeps a requested spec-ctrl when the host still provides amd-ibpb and one of amd-ibrs, amd-stibp and amd-ssbd. KVM then keeps MSR_IA32_SPEC_CTRL and MSR_IA32_PRED_CMD available to the guest through those bits (kernel commits 39485ed95d6b, 841c2be09fe4). Signed-off-by: Denis V. Lunev --- hw/i386/pc.c | 1 + target/i386/cpu.c | 14 ++++++++++++++ target/i386/cpu.h | 1 + 3 files changed, 16 insertions(+) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 25b17866103..95ff2e7860e 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -550,6 +550,7 @@ const size_t pc_vz_compat_len = G_N_ELEMENTS(pc_vz_compat); GlobalProperty pc_vz_9_2_compat[] = { { TYPE_X86_CPU, "x-tsx-compat", "on" }, + { TYPE_X86_CPU, "x-spec-ctrl-compat", "on" }, }; const size_t pc_vz_9_2_compat_len = G_N_ELEMENTS(pc_vz_9_2_compat); diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 5ff5644dee9..872c00fc983 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -9116,6 +9116,19 @@ static uint64_t x86_cpu_compat_kept_features(X86CPU *cpu, FeatureWord w) kept = CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_RTM; } break; + case FEAT_7_0_EDX: + if (cpu->spec_ctrl_compat && IS_AMD_CPU(env)) { + uint32_t ebx = kvm_arch_get_supported_cpuid(kvm_state, 0x80000008, + 0, R_EBX); + + if ((ebx & CPUID_8000_0008_EBX_IBPB) && + (ebx & (CPUID_8000_0008_EBX_IBRS | + CPUID_8000_0008_EBX_STIBP | + CPUID_8000_0008_EBX_AMD_SSBD))) { + kept = CPUID_7_0_EDX_SPEC_CTRL; + } + } + break; default: break; } @@ -10081,6 +10094,7 @@ static const Property x86_cpu_properties[] = { DEFINE_PROP_BOOL("x-pdcm-on-even-without-pmu", X86CPU, pdcm_on_even_without_pmu, false), DEFINE_PROP_BOOL("x-tsx-compat", X86CPU, tsx_compat, false), + DEFINE_PROP_BOOL("x-spec-ctrl-compat", X86CPU, spec_ctrl_compat, false), }; #ifndef CONFIG_USER_ONLY diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 85efd0b9fbe..740fb3aedc5 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2337,6 +2337,7 @@ struct ArchCPU { * older node keeps its CPUID. */ bool tsx_compat; + bool spec_ctrl_compat; /* Number of physical address bits supported */ uint32_t phys_bits; -- 2.53.0 _______________________________________________ Devel mailing list Devel@openvz.org https://lists.openvz.org/mailman/listinfo/devel