[PATCH v3 hci-8.0/hci-8.1 4/6] i386: keep bus-lock-detect for AMD guests on vz machine types up to vz9.2.0 #VSTOR-152291

["Denis V. Lunev" <den@openvz.org>]

From: Denis V. Lunev <den@openvz.org>

Since kernel commit 54950bfe2b69 KVM on AMD no longer offers
bus-lock-detect. A Zen 5 guest started under an older kernel has it in
its CPUID, and QEMU filters it on the new host, so migration, restore
and snapshot revert fail (VSTOR-152291).

Add x-bus-lock-detect-compat and turn it on in pc_vz_9_2_compat: an
AMD guest keeps a requested bus-lock-detect. The guest loses nothing
it had: bus lock detection did not work under KVM on AMD before kernel
commit 62ad461079e7, DR6 bit 11 stays fixed, and a Linux 6.13 or newer
guest only logs one "unchecked MSR access" warning when it brings a
vCPU online.

Signed-off-by: Denis V. Lunev <den@openvz.org>
Acked-by: Andrey Drobyshev <andrey.drobyshev@virtuozzo.com>
---
 hw/i386/pc.c      | 1 +
 target/i386/cpu.c | 7 +++++++
 target/i386/cpu.h | 1 +
 3 files changed, 9 insertions(+)

diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 95ff2e7860e..91198e8996c 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -551,6 +551,7 @@ const size_t pc_vz_compat_len = G_N_ELEMENTS(pc_vz_compat);
 GlobalProperty pc_vz_9_2_compat[] = {
     { TYPE_X86_CPU, "x-tsx-compat", "on" },
     { TYPE_X86_CPU, "x-spec-ctrl-compat", "on" },
+    { TYPE_X86_CPU, "x-bus-lock-detect-compat", "on" },
 };
 const size_t pc_vz_9_2_compat_len = G_N_ELEMENTS(pc_vz_9_2_compat);
 
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 27fefaeaf71..a3c5c9ce1a8 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -9116,6 +9116,11 @@ static uint64_t x86_cpu_compat_kept_features(X86CPU *cpu, FeatureWord w)
             kept = CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_RTM;
         }
         break;
+    case FEAT_7_0_ECX:
+        if (cpu->bus_lock_detect_compat && IS_AMD_CPU(env)) {
+            kept = CPUID_7_0_ECX_BUS_LOCK_DETECT;
+        }
+        break;
     case FEAT_7_0_EDX:
         if (cpu->spec_ctrl_compat && IS_AMD_CPU(env)) {
             uint64_t msrs = env->features[FEAT_8000_0008_EBX] &
@@ -10095,6 +10100,8 @@ static const Property x86_cpu_properties[] = {
                      pdcm_on_even_without_pmu, false),
     DEFINE_PROP_BOOL("x-tsx-compat", X86CPU, tsx_compat, false),
     DEFINE_PROP_BOOL("x-spec-ctrl-compat", X86CPU, spec_ctrl_compat, false),
+    DEFINE_PROP_BOOL("x-bus-lock-detect-compat", X86CPU,
+                     bus_lock_detect_compat, false),
 };
 
 #ifndef CONFIG_USER_ONLY
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 740fb3aedc5..b5e2d88d5d5 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2338,6 +2338,7 @@ struct ArchCPU {
      */
     bool tsx_compat;
     bool spec_ctrl_compat;
+    bool bus_lock_detect_compat;
 
     /* Number of physical address bits supported */
     uint32_t phys_bits;
-- 
2.53.0