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[130.117.225.111]) by mx.google.com with ESMTPS id ffacd0b85a97d-48e3ed160easi31369712f8f.376.2026.10.29.03.16.28 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Oct 2026 03:16:28 -0700 (PDT) Received-SPF: pass (google.com: domain of vladimir.riabchun@virtuozzo.com designates 130.117.225.111 as permitted sender) client-ip=130.117.225.111; Authentication-Results: mx.google.com; dkim=pass header.i=@virtuozzo.com header.s=relay header.b=r5NQDV5h; spf=pass (google.com: domain of vladimir.riabchun@virtuozzo.com designates 130.117.225.111 as permitted sender) smtp.mailfrom=vladimir.riabchun@virtuozzo.com; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=virtuozzo.com DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=virtuozzo.com; s=relay; h=Message-Id:Content-Type:MIME-Version:Subject:Date :From; bh=gLNAUFGp7RwltIPpHV6RbALYDTVL8dQAx7fjajyYsRc=; b=r5NQDV5hBwxwSYcVzaT TxQ5E7UtA9wEI1j97ymW8AdkBTqCOZAL2vGzAt9sWLHJJVIfC0ZMkKX+PcTlnMvt9elPmIJOq/sp4 niQADArlNY3AqdaT4LfusQgcLP5kX9ku9rX4VLxDiUKzaXVkrIBTQk0mxHw7kGRWilIERmqcif/Xp 60CVmT/9HgzrM9h3DfMa+NBXOcx5pAHaqQdcJaCU0/6bk+mMQAXaOnj7xKi26KBUB4NEtsqGZ4Pf7 KSkBAkSk+c0f+aZdYaYfW2gq/KXKuW4I4WV4Vrj1tz2K5aIZ2Q69C3ddHDoaxUtoJoRAh3BR7GFlX UEr/c1I9IIZV2eA==; Received: from ch-demo-asa.virtuozzo.com ([130.117.225.8] helo=192.168.1.87) by relay.virtuozzo.com with esmtps (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1xMN7Z-001e0Y-0c; Thu, 29 Oct 2026 11:16:26 +0100 From: Vladimir Riabchun Date: Thu, 29 Oct 2026 11:16:06 +0100 MIME-Version: 1.0 Message-Id: <20261029-ct-invalid-nrpoc-v3-1-89d4b0b7d520@virtuozzo.com> References: <20261029-ct-invalid-nrpoc-v3-0-89d4b0b7d520@virtuozzo.com> In-Reply-To: <20261029-ct-invalid-nrpoc-v3-0-89d4b0b7d520@virtuozzo.com> To: Konstantin Khorenko , ptikhomirov@virtuozzo.com X-Mailer: b4 0.16.0 X-OZ-Fwd: true Cc: devel@openvz.org Subject: [Devel] [PATCH hci-8.1 v3 1/2] sched: Fix sched_getaffinity syscall X-BeenThere: devel@openvz.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: OpenVZ development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: devel-bounces@openvz.org Errors-To: devel-bounces@openvz.org We observed incorrect cpu numbers inside containers: [root@localhost ~]# nproc 64 even when there were much less physical/virtual CPUs. The root cause is incorrect bitmap_fill usage - it sets whole integers only, without handling bit tails, so the actual number of set bits is 64 = bits in ULONG. If we use cpumask only or vcpus only, nproc and other getaffinity users will get incorrect info about CT resources. We can't run on more than count(cpuset) CPUs and we are limited by vCPU number. So the minimum of these two is the real limit. Return first bits set - anyway they can't be used for anything except counting from inside CT. Host behavior is not changed. It is also intentional that we perform VE check against current exec env - CT users will get virtualized view and host users will get real affinity without vCPU info. https://virtuozzo.atlassian.net/browse/VSTOR-141682 Signed-off-by: Vladimir Riabchun --- kernel/sched/syscalls.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/kernel/sched/syscalls.c b/kernel/sched/syscalls.c index 6d921043e9e7..ce5200c84573 100644 --- a/kernel/sched/syscalls.c +++ b/kernel/sched/syscalls.c @@ -1316,15 +1316,23 @@ long sched_getaffinity(pid_t pid, struct cpumask *mask) if (retval) return retval; + scoped_guard (raw_spinlock_irqsave, &p->pi_lock) { + cpumask_and(mask, &p->cpus_mask, cpu_active_mask); + } + if (!ve_is_super(get_exec_env())) { + /* + * setaffinity is not available inside CT, so these bits + * can only be used for counting. + * We can't have more than vcpus and we can't run on CPUs + * outside the mask. Reporting smallest will provide true + * information about CT resources. + */ + unsigned int vcpus_avail = min(task_nr_cpus(p), cpumask_weight(mask)); cpumask_clear(mask); - bitmap_fill(cpumask_bits(mask), num_online_vcpus()); - return 0; + bitmap_set(cpumask_bits(mask), 0, vcpus_avail); } - guard(raw_spinlock_irqsave)(&p->pi_lock); - cpumask_and(mask, &p->cpus_mask, cpu_active_mask); - return 0; } -- 2.52.0 _______________________________________________ Devel mailing list Devel@openvz.org https://lists.openvz.org/mailman/listinfo/devel